As a new hire to the Otis Elevator Company, my senior engineer gave me the task of implementing a state machine design into an FPGA. The design was for the opening and closing of an elevator door. I was given the inputs, outputs, a state graph, a block diagram/schematic of the design, as well as photographs of an elevator door test fixture to use as a template. First, I created a state chart (left), and filled it out using the state graph given. Then, using the state chart, I found the Boolean equations (right) for the inputs of the two D flip-flops that I will use, as well as the equations for each output given.
After getting the equations, I implemented them into the PLD side of Multisim. Using pins for the outputs and inputs, and two D Flip-Flops, I was able to create the simulation of the elevator door.
Using the pictures given, I was able to construct my own Elevator Door test fixture using FischerTech parts. I programmed my PLD design onto the FPGA board. I had to use a 9V external power supply for the prototype, and had to use an L298 H-bridge driver to control the power going through the circuit. Using the block diagram, I was able to wire the power supply, motor, switches, and the pins I used in my PLD design I programmed, all together.
To operate the elevator door, connect the long wires to your external power supply. GND goes to ground, and PWR goes to +9. The door should stay in its original position. Press the switch labeled "Open Door", and the elevator door should begin opening. The door will stop once it reaches its open limit. Now press the close button, labeled BTN0 on the FPGA board. The door should close until it hits its close limit. And that is how to operate an elevator for dummies!